This invention relates generally to image formation control technique and further to an image formation data controller for controlling access to a frame buffer memory used for image formation data storage in a hard copy image producing device. For instance, the present invention relates to the technique which will be effective when applied to an apparatus which supports image formation data output address operation control, drawing address control and refresh address control for a frame buffer memory which contains the image formation data for a laser printer.
CRTC (Cathode Ray Tube Controller) and ACRTC (Advanced Cathode Ray Tube Controller) have been used conventionally as a controller for making display and drawing address control for a frame buffer memory. These controllers fundamentally perform display control functions by utilizing various parameters such as the timing of horizontal and vertical sync signals, the number of characters or pixels per row, the number of rasters, and so forth. They supply display data to a CRT display in accordance with these parameters while at the same time, they change the content of a display surface and refresh a dynamic frame buffer memory during a non-display period such as a horizontal trace line period, as described, for example, in "LSI Handbook", published by Ohm-sha, Nov. 30, 1984, pp. 554-556.
The inventors of the present invention examined the possibility of applying the display controller of the kind described above to the control of a hard copy apparatus such as a laser printer for forming an image by a system analogous to raster scanning in a CRT display apparatus. The present invention describes a display controller which supports a print data output address operation control for a frame buffer memory, a drawing control of print data for the frame buffer memory and a refresh address control for the frame buffer memory.
In the hard copy apparatuses such as the laser printer, necessary print data must be supplied in coordination with the state of a mechanical system which drives an optical system and a photosensitive drum as well as supplying paper. In the hard copy apparatuses such as the laser printer, however, the timing signals of a machine system change frequently at a row, or line on paper change during a normal print operation or at the occurrence of trouble such as the shortage of paper or ink. Under such circumstances, a display controller utilizes horizontal and vertical sync signals for system synchronization require a timing adjustment circuit to resynchronize the print data output address control with the state of the machine system of the hard copy apparatus. This resynchronization further complicates the refresh operation and the circuit construction of the apparatus.
In the prior art, the refresh address control by the display controller executes in a relatively short period in during non-display period such as the horizontal retrace line period while being synchronized with the horizontal and vertical sync signals. However, in a hard copy apparatus such as the laser printer, the image non-formation period is not constant because the apparatus involves the operation of a machine system which is not coordinated with a request for the image formation data. This necessitates the addition of a timing adjustment circuit function for the memory refresh operation. This circuit is exclusively used for coordinating the print data output address control with the state of the machine system of the hard copy apparatus to perform the memory refresh operation in the shortest necessary interval. It has thus been extremely difficult to synchronize the output timing control of the print data output address with the drawing address output and the refresh address output.